- c -

• CAL_ERROR_APPLY_CAL_MSG : calibration_messages.h , voted_sensors_update.cpp
• CAL_ERROR_RESET_CAL_MSG : calibration_messages.h
• CAL_ERROR_SENSOR_MSG : calibration_messages.h
• CAL_ERROR_SET_PARAMS_MSG : calibration_messages.h
• CAL_QGC_CANCELLED_MSG : calibration_messages.h
• CAL_QGC_DONE_MSG : calibration_messages.h
• CAL_QGC_FAILED_MSG : calibration_messages.h
• CAL_QGC_ORIENTATION_DETECTED_MSG : calibration_messages.h
• CAL_QGC_PROGRESS_MSG : calibration_messages.h
• CAL_QGC_SIDE_DONE_MSG : calibration_messages.h
• CAL_QGC_STARTED_MSG : calibration_messages.h
• calibration_log_critical : calibration_routines.h
• calibration_log_emergency : calibration_routines.h
• calibration_log_info : calibration_routines.h
• CAT : px4_macros.h
• CBRK_AIRSPD_CHK_KEY : circuit_breaker.h
• CBRK_BUZZER_KEY : drv_tone_alarm.h
• CBRK_ENGINEFAIL_KEY : circuit_breaker.h
• CBRK_FLIGHTTERM_KEY : circuit_breaker.h
• CBRK_GPSFAIL_KEY : circuit_breaker.h
• CBRK_IO_SAFETY_KEY : circuit_breaker.h
• CBRK_OFF : drv_tone_alarm.h
• CBRK_ON : drv_tone_alarm.h
• CBRK_RATE_CTRL_KEY : circuit_breaker.h
• CBRK_SUPPLY_CHK_KEY : circuit_breaker.h
• CBRK_UNINIT : drv_tone_alarm.h
• CBRK_USB_CHK_KEY : circuit_breaker.h
• CBRK_VELPOSERR_KEY : circuit_breaker.h
• CCASSERT : px4_macros.h
• CCX_DEFAULT_LSB : rm3100.h
• CCX_DEFAULT_MSB : rm3100.h
• CCY_DEFAULT_LSB : rm3100.h
• CCY_DEFAULT_MSB : rm3100.h
• CCZ_DEFAULT_LSB : rm3100.h
• CCZ_DEFAULT_MSB : rm3100.h
• CDL_DELETE : utlist.h
• CDL_FOREACH : utlist.h
• CDL_FOREACH_SAFE : utlist.h
• CDL_PREPEND : utlist.h
• CDL_SEARCH : utlist.h
• CDL_SEARCH_SCALAR : utlist.h
• CDL_SORT : utlist.h
• CHECK_COPY : uORBTest_UnitTest.cpp
• CHECK_NOT_UPDATED : uORBTest_UnitTest.cpp
• CHECK_SYSID_COMPID_MISSION : mavlink_mission.cpp
• CHECK_UPDATED : uORBTest_UnitTest.cpp
• CHIP_ID : bma180.cpp
• CL : print_load_posix.c
• CLEAR_LINE : uORBDeviceMaster.cpp
• CLOCK_FREQ : PCA9685.h
• CMD_DEBUG : mavlink_command_sender.cpp
• CMM_DEFAULT : rm3100.h
• CNTL_REG1_DEFAULT : lis3mdl.h
• CNTL_REG2_DEFAULT : lis3mdl.h
• CNTL_REG3_DEFAULT : lis3mdl.h
• CNTL_REG4_DEFAULT : lis3mdl.h
• CNTL_REG5_DEFAULT : lis3mdl.h
• CODER_CHECK : tinybson.cpp
• CODER_KILL : tinybson.cpp
• COMMANDER_MONITORING_LOOPSPERMSEC : Commander.cpp
• COMMANDER_STATE_MAIN_STATE_ACRO : commander_state.h
• COMMANDER_STATE_MAIN_STATE_ALTCTL : commander_state.h
• COMMANDER_STATE_MAIN_STATE_AUTO_FOLLOW_TARGET : commander_state.h
• COMMANDER_STATE_MAIN_STATE_AUTO_LAND : commander_state.h
• COMMANDER_STATE_MAIN_STATE_AUTO_LOITER : commander_state.h
• COMMANDER_STATE_MAIN_STATE_AUTO_MISSION : commander_state.h
• COMMANDER_STATE_MAIN_STATE_AUTO_PRECLAND : commander_state.h
• COMMANDER_STATE_MAIN_STATE_AUTO_RTL : commander_state.h
• COMMANDER_STATE_MAIN_STATE_AUTO_TAKEOFF : commander_state.h
• COMMANDER_STATE_MAIN_STATE_MANUAL : commander_state.h
• COMMANDER_STATE_MAIN_STATE_MAX : commander_state.h
• COMMANDER_STATE_MAIN_STATE_OFFBOARD : commander_state.h
• COMMANDER_STATE_MAIN_STATE_ORBIT : commander_state.h
• COMMANDER_STATE_MAIN_STATE_POSCTL : commander_state.h
• COMMANDER_STATE_MAIN_STATE_RATTITUDE : commander_state.h
• COMMANDER_STATE_MAIN_STATE_STAB : commander_state.h
• commandParamToInt : camera_capture.cpp , camera_trigger.cpp
• COMMS_H : comms.h
• CONFIG_AT24XX_ADDR : 24xxxx_mtd.c
• CONFIG_AT24XX_MTD_BLOCKSIZE : 24xxxx_mtd.c
• CONFIG_AT24XX_SIZE : 24xxxx_mtd.c
• CONFIG_AT24XX_WRITE_TIMEOUT_MS : 24xxxx_mtd.c
• CONFIG_CDCACM_PRODUCTID : version.c
• CONFIG_ISTACK_SIZE : hardfault_log.h
• CONFIG_MAX_TASKS : printload.h
• CONFIG_USTACK_SIZE : hardfault_log.h
• CONTINUOUS_MODE : rm3100.h
• CONTROL_INPUT_DROP_LIMIT_MS : mkblctrl.cpp
• CONTROL_PAGE_INDEX : px4io.h
• CONTROLLER_PERIOD_DEFAULT : heater.h
• CONVERSION_INTERVAL : ets_airspeed.cpp , ms4525_airspeed.cpp , SDP3X.hpp , LSM303AGR.cpp
• CR_PSIZE_MASK : otp.h
• CRC16_INITIAL : crc.h
• CRC16_OUTPUT_XOR : crc.h
• CRC64_INITIAL : crc.h
• CRC64_OUTPUT_XOR : crc.h
• CRC_H : boot_app_shared.c
• crc_HiLOC : boot_app_shared.c
• CRC_L : boot_app_shared.c
• crc_LoLOC : boot_app_shared.c
• CRSF_BAUDRATE : crsf.cpp
• CRSF_DEBUG : crsf.cpp
• CRSF_FRAME_SIZE_MAX : crsf.h
• CRSF_PAYLOAD_SIZE_MAX : crsf.h
• CRSF_SYNC_BYTE : crsf.cpp
• CRSF_VERBOSE : crsf.cpp
• CTRL1_MODE_SHFITS : ist8310.cpp
• CTRL1_MODE_SINGLE : ist8310.cpp
• CTRL1_MODE_STDBY : ist8310.cpp
• CTRL2_DREN : ist8310.cpp
• CTRL2_DREN_SHIFTS : ist8310.cpp
• CTRL2_DRP : ist8310.cpp
• CTRL2_DRP_SHIFTS : ist8310.cpp
• CTRL2_SRST : ist8310.cpp
• CTRL2_SRST_SHFITS : ist8310.cpp
• CTRL3_SAMPLEAVG_16 : ist8310.cpp
• CTRL3_SAMPLEAVG_2 : ist8310.cpp
• CTRL3_SAMPLEAVG_4 : ist8310.cpp
• CTRL3_SAMPLEAVG_8 : ist8310.cpp
• CTRL4_SRPD : ist8310.cpp
• CTRL_REG0_BW : FXAS21002C.cpp
• CTRL_REG0_BW_HIGH : FXAS21002C.cpp
• CTRL_REG0_BW_LOW : FXAS21002C.cpp
• CTRL_REG0_BW_MASK : FXAS21002C.cpp
• CTRL_REG0_BW_MED : FXAS21002C.cpp
• CTRL_REG0_BW_SHIFTS : FXAS21002C.cpp
• CTRL_REG0_FS_1000_DPS : FXAS21002C.cpp
• CTRL_REG0_FS_2000_DPS : FXAS21002C.cpp
• CTRL_REG0_FS_250_DPS : FXAS21002C.cpp
• CTRL_REG0_FS_500_DPS : FXAS21002C.cpp
• CTRL_REG0_FS_MASK : FXAS21002C.cpp
• CTRL_REG0_FS_SHIFTS : FXAS21002C.cpp
• CTRL_REG0_HPF_EN : FXAS21002C.cpp
• CTRL_REG0_SEL_MASK : FXAS21002C.cpp
• CTRL_REG0_SEL_SHIFTS : FXAS21002C.cpp
• CTRL_REG0_SPIW : FXAS21002C.cpp
• CTRL_REG1_ACTIVE : FXOS8701CQ.hpp , FXAS21002C.cpp
• CTRL_REG1_ALT : mpl3115a2.h
• CTRL_REG1_BDU : lps25h.cpp
• CTRL_REG1_DIFF_EN : lps25h.cpp
• CTRL_REG1_DR : FXOS8701CQ.hpp
• CTRL_REG1_DR_100HZ : FXAS21002C.cpp
• CTRL_REG1_DR_12_5 : FXAS21002C.cpp
• CTRL_REG1_DR_12_5_1 : FXAS21002C.cpp
• CTRL_REG1_DR_200HZ : FXAS21002C.cpp
• CTRL_REG1_DR_25HZ : FXAS21002C.cpp
• CTRL_REG1_DR_400HZ : FXAS21002C.cpp
• CTRL_REG1_DR_50HZ : FXAS21002C.cpp
• CTRL_REG1_DR_800HZ : FXAS21002C.cpp
• CTRL_REG1_DR_MASK : FXAS21002C.cpp , FXOS8701CQ.hpp
• CTRL_REG1_DR_SHIFTS : FXAS21002C.cpp , FXOS8701CQ.hpp
• CTRL_REG1_ODR_12HZ5 : lps25h.cpp
• CTRL_REG1_ODR_1HZ : lps25h.cpp
• CTRL_REG1_ODR_25HZ : lps25h.cpp
• CTRL_REG1_ODR_7HZ : lps25h.cpp
• CTRL_REG1_ODR_SINGLE : lps25h.cpp
• CTRL_REG1_OS : mpl3115a2.h
• CTRL_REG1_OS_MASK : mpl3115a2.h
• CTRL_REG1_OS_SHIFTS : mpl3115a2.h
• CTRL_REG1_OST : mpl3115a2.h
• CTRL_REG1_PD : lps25h.cpp
• CTRL_REG1_RAW : mpl3115a2.h
• CTRL_REG1_READY : FXAS21002C.cpp
• CTRL_REG1_RESET_AZ : lps25h.cpp
• CTRL_REG1_RST : mpl3115a2.h , FXAS21002C.cpp
• CTRL_REG1_SBYB : mpl3115a2.h
• CTRL_REG1_SIM : lps25h.cpp
• CTRL_REG1_ST : FXAS21002C.cpp
• CTRL_REG2_AUTO_INC : FXOS8701CQ.hpp
• CTRL_REG2_AUTO_ZERO : lps25h.cpp
• CTRL_REG2_BOOT : lps25h.cpp
• CTRL_REG2_FIFO_EN : lps25h.cpp
• CTRL_REG2_FIFO_MEAN_DEC : lps25h.cpp
• CTRL_REG2_INT_CFG_DRDY : FXAS21002C.cpp
• CTRL_REG2_INT_CFG_FIFO : FXAS21002C.cpp
• CTRL_REG2_INT_CFG_RT : FXAS21002C.cpp
• CTRL_REG2_INT_EN_DRDY : FXAS21002C.cpp
• CTRL_REG2_INT_EN_FIFO : FXAS21002C.cpp
• CTRL_REG2_INT_EN_RT : FXAS21002C.cpp
• CTRL_REG2_IPOL : FXAS21002C.cpp
• CTRL_REG2_ONE_SHOT : lps25h.cpp
• CTRL_REG2_PP_OD : FXAS21002C.cpp
• CTRL_REG2_SWRESET : lps25h.cpp
• CTRL_REG2_WTM_EN : lps25h.cpp
• CTRL_REG3_EXTCTRLEN : FXAS21002C.cpp
• CTRL_REG3_FS_DOUBLE : FXAS21002C.cpp
• CTRL_REG3_INT1_S_DATA : lps25h.cpp
• CTRL_REG3_INT1_S_P_HIGH : lps25h.cpp
• CTRL_REG3_INT1_S_P_LIM : lps25h.cpp
• CTRL_REG3_INT1_S_P_LOW : lps25h.cpp
• CTRL_REG3_INT_H_L : lps25h.cpp
• CTRL_REG3_PP_OD : lps25h.cpp
• CTRL_REG3_WRAPTOONE : FXAS21002C.cpp
• CTRL_REG4_P1_DRDY : lps25h.cpp
• CTRL_REG4_P1_EMPTY : lps25h.cpp
• CTRL_REG4_P1_OVERRUN : lps25h.cpp
• CTRL_REG4_P1_WTM : lps25h.cpp
• CURR_LIM_P1 : pga460.h
• CURR_LIM_P2 : pga460.h