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uavcan_kinetis::flexcan::CanType Struct Reference

#include <flexcan.hpp>

Collaboration diagram for uavcan_kinetis::flexcan::CanType:

Public Attributes

volatile uint32_t MCR
 
volatile uint32_t CTRL1
 
volatile uint32_t TIMER
 
uint32_t Reserved0
 
volatile uint32_t RXMGMASK
 
volatile uint32_t RX14MASK
 
volatile uint32_t RX15MASK
 
volatile uint32_t ECR
 
volatile uint32_t ESR1
 
uint32_t Reserved1
 
volatile uint32_t IMASK1
 
uint32_t Reserved2
 
volatile uint32_t IFLAG1
 
volatile uint32_t CTRL2
 
volatile uint32_t ESR2
 
uint32_t Reserved3
 
uint32_t Reserved4
 
volatile uint32_t CRCR
 
volatile uint32_t RXFGMASK
 
volatile uint32_t RXFIR
 
uint32_t RESERVED5 [12]
 
union {
   RxFiFoType   fifo
 
   MessageBufferType   mb
 
} MB [HWMaxMB]
 
uint32_t RESERVED6 [448]
 
volatile FilterType RXIMR [HWMaxMB]
 

Detailed Description

Definition at line 135 of file flexcan.hpp.

Member Data Documentation

◆ CRCR

volatile uint32_t uavcan_kinetis::flexcan::CanType::CRCR

CRC Register, Address offset: 0x0044

Definition at line 153 of file flexcan.hpp.

◆ CTRL1

volatile uint32_t uavcan_kinetis::flexcan::CanType::CTRL1

Control 1 Register, Address offset: 0x0004

Definition at line 137 of file flexcan.hpp.

◆ CTRL2

volatile uint32_t uavcan_kinetis::flexcan::CanType::CTRL2

Control 2 Register, Address offset: 0x0034

Definition at line 149 of file flexcan.hpp.

◆ ECR

volatile uint32_t uavcan_kinetis::flexcan::CanType::ECR

Error Counter, Address offset: 0x001c

Definition at line 143 of file flexcan.hpp.

◆ ESR1

volatile uint32_t uavcan_kinetis::flexcan::CanType::ESR1

Error and Status 1 Register, Address offset: 0x0020

Definition at line 144 of file flexcan.hpp.

◆ ESR2

volatile uint32_t uavcan_kinetis::flexcan::CanType::ESR2

Error and Status 2 Register, Address offset: 0x0038

Definition at line 150 of file flexcan.hpp.

◆ fifo

RxFiFoType uavcan_kinetis::flexcan::CanType::fifo

Definition at line 158 of file flexcan.hpp.

◆ IFLAG1

volatile uint32_t uavcan_kinetis::flexcan::CanType::IFLAG1

Interrupt Flags 1 Register, Address offset: 0x0030

Definition at line 148 of file flexcan.hpp.

Referenced by uavcan_kinetis::can0_irq().

◆ IMASK1

volatile uint32_t uavcan_kinetis::flexcan::CanType::IMASK1

Interrupt Masks 1 Register, Address offset: 0x0028

Definition at line 146 of file flexcan.hpp.

◆ mb

MessageBufferType uavcan_kinetis::flexcan::CanType::mb

Definition at line 159 of file flexcan.hpp.

◆ MB

union { ... } uavcan_kinetis::flexcan::CanType::MB[HWMaxMB]

◆ MCR

volatile uint32_t uavcan_kinetis::flexcan::CanType::MCR

Module Configuration Register, Address offset: 0x0000

Definition at line 136 of file flexcan.hpp.

◆ Reserved0

uint32_t uavcan_kinetis::flexcan::CanType::Reserved0

Reserved Address offset: 0x000c

Definition at line 139 of file flexcan.hpp.

◆ Reserved1

uint32_t uavcan_kinetis::flexcan::CanType::Reserved1

Reserved Address offset: 0x0024

Definition at line 145 of file flexcan.hpp.

◆ Reserved2

uint32_t uavcan_kinetis::flexcan::CanType::Reserved2

Reserved Address offset: 0x002C

Definition at line 147 of file flexcan.hpp.

◆ Reserved3

uint32_t uavcan_kinetis::flexcan::CanType::Reserved3

Reserved Address offset: 0x003c

Definition at line 151 of file flexcan.hpp.

◆ Reserved4

uint32_t uavcan_kinetis::flexcan::CanType::Reserved4

Reserved Address offset: 0x0040

Definition at line 152 of file flexcan.hpp.

◆ RESERVED5

uint32_t uavcan_kinetis::flexcan::CanType::RESERVED5[12]

Reserved Address offset: 0x0050

Definition at line 156 of file flexcan.hpp.

◆ RESERVED6

uint32_t uavcan_kinetis::flexcan::CanType::RESERVED6[448]

Reserved Address offset: 0x0180

Definition at line 161 of file flexcan.hpp.

◆ RX14MASK

volatile uint32_t uavcan_kinetis::flexcan::CanType::RX14MASK

Rx 14 Mask Register, Address offset: 0x0014

Definition at line 141 of file flexcan.hpp.

◆ RX15MASK

volatile uint32_t uavcan_kinetis::flexcan::CanType::RX15MASK

Rx 15 Mask Register, Address offset: 0x0018

Definition at line 142 of file flexcan.hpp.

◆ RXFGMASK

volatile uint32_t uavcan_kinetis::flexcan::CanType::RXFGMASK

Rx FIFO Global Mask Register, Address offset: 0x0048

Definition at line 154 of file flexcan.hpp.

◆ RXFIR

volatile uint32_t uavcan_kinetis::flexcan::CanType::RXFIR

Rx FIFO Information Register, Address offset: 0x004c

Definition at line 155 of file flexcan.hpp.

◆ RXIMR

volatile FilterType uavcan_kinetis::flexcan::CanType::RXIMR[HWMaxMB]

R0 Individual Mask Registers, Address offset: 0x0880

Definition at line 162 of file flexcan.hpp.

◆ RXMGMASK

volatile uint32_t uavcan_kinetis::flexcan::CanType::RXMGMASK

Rx Mailboxes Global Mask Register, Address offset: 0x0010

Definition at line 140 of file flexcan.hpp.

◆ TIMER

volatile uint32_t uavcan_kinetis::flexcan::CanType::TIMER

Free Running Timer, Address offset: 0x0008

Definition at line 138 of file flexcan.hpp.

The documentation for this struct was generated from the following file: