#include <lib/drivers/accelerometer/PX4Accelerometer.hpp>
#include <lib/drivers/gyroscope/PX4Gyroscope.hpp>
#include <lib/ecl/geo/geo.h>
#include <px4_platform_common/getopt.h>
#include <px4_platform_common/px4_work_queue/ScheduledWorkItem.hpp>
#include <lib/systemlib/conversions.h>
#include <lib/systemlib/px4_macros.h>
#include "MPU9250_mag.h"
Go to the source code of this file.
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struct | MPUReport |
| Report conversation within the mpu, including command byte and interrupt status. More...
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class | MPU9250 |
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◆ BIT_FIFO_RST
#define BIT_FIFO_RST 0x04 |
◆ BIT_H_RESET
◆ BIT_I2C_FIFO_EN
#define BIT_I2C_FIFO_EN 0x40 |
◆ BIT_I2C_IF_DIS
#define BIT_I2C_IF_DIS 0x10 |
◆ BIT_I2C_MST_EN
#define BIT_I2C_MST_EN 0x20 |
◆ BIT_I2C_MST_MULT_MST_EN
#define BIT_I2C_MST_MULT_MST_EN 0x80 |
◆ BIT_I2C_MST_P_NSR
#define BIT_I2C_MST_P_NSR 0x10 |
◆ BIT_I2C_MST_RST
#define BIT_I2C_MST_RST 0x02 |
◆ BIT_I2C_MST_SLV_3_FIFO_EN
#define BIT_I2C_MST_SLV_3_FIFO_EN 0x20 |
◆ BIT_I2C_MST_WAIT_FOR_ES
#define BIT_I2C_MST_WAIT_FOR_ES 0x40 |
◆ BIT_I2C_READ_FLAG
#define BIT_I2C_READ_FLAG 0x80 |
◆ BIT_I2C_SLV0_BYTE_SW
#define BIT_I2C_SLV0_BYTE_SW 0x40 |
◆ BIT_I2C_SLV0_DLY_EN
#define BIT_I2C_SLV0_DLY_EN 0x01 |
◆ BIT_I2C_SLV0_EN
#define BIT_I2C_SLV0_EN 0x80 |
◆ BIT_I2C_SLV0_NACK
#define BIT_I2C_SLV0_NACK 0x01 |
◆ BIT_I2C_SLV0_REG_DIS
#define BIT_I2C_SLV0_REG_DIS 0x20 |
◆ BIT_I2C_SLV0_REG_GRP
#define BIT_I2C_SLV0_REG_GRP 0x10 |
◆ BIT_I2C_SLV1_DLY_EN
#define BIT_I2C_SLV1_DLY_EN 0x02 |
◆ BIT_I2C_SLV2_DLY_EN
#define BIT_I2C_SLV2_DLY_EN 0x04 |
◆ BIT_I2C_SLV3_DLY_EN
#define BIT_I2C_SLV3_DLY_EN 0x08 |
◆ BIT_INT_ANYRD_2CLEAR
#define BIT_INT_ANYRD_2CLEAR 0x10 |
◆ BIT_INT_BYPASS_EN
#define BIT_INT_BYPASS_EN 0x02 |
◆ BIT_RAW_RDY_EN
#define BIT_RAW_RDY_EN 0x01 |
◆ BIT_SIG_COND_RST
#define BIT_SIG_COND_RST 0x01 |
◆ BIT_SLEEP
◆ BITS_ACCEL_CONFIG2_41HZ
#define BITS_ACCEL_CONFIG2_41HZ 0x03 |
◆ BITS_DLPF_CFG_10HZ
#define BITS_DLPF_CFG_10HZ 0x05 |
◆ BITS_DLPF_CFG_184HZ
#define BITS_DLPF_CFG_184HZ 0x01 |
◆ BITS_DLPF_CFG_20HZ
#define BITS_DLPF_CFG_20HZ 0x04 |
◆ BITS_DLPF_CFG_250HZ
#define BITS_DLPF_CFG_250HZ 0x00 |
◆ BITS_DLPF_CFG_3600HZ
#define BITS_DLPF_CFG_3600HZ 0x07 |
◆ BITS_DLPF_CFG_41HZ
#define BITS_DLPF_CFG_41HZ 0x03 |
◆ BITS_DLPF_CFG_5HZ
#define BITS_DLPF_CFG_5HZ 0x06 |
◆ BITS_DLPF_CFG_92HZ
#define BITS_DLPF_CFG_92HZ 0x02 |
◆ BITS_DLPF_CFG_MASK
#define BITS_DLPF_CFG_MASK 0x07 |
◆ BITS_FS_1000DPS
#define BITS_FS_1000DPS 0x10 |
◆ BITS_FS_2000DPS
#define BITS_FS_2000DPS 0x18 |
◆ BITS_FS_250DPS
#define BITS_FS_250DPS 0x00 |
◆ BITS_FS_500DPS
#define BITS_FS_500DPS 0x08 |
◆ BITS_FS_MASK
#define BITS_FS_MASK 0x18 |
◆ BITS_GYRO_ST_X
#define BITS_GYRO_ST_X 0x80 |
◆ BITS_GYRO_ST_Y
#define BITS_GYRO_ST_Y 0x40 |
◆ BITS_GYRO_ST_Z
#define BITS_GYRO_ST_Z 0x20 |
◆ BITS_I2C_MST_CLOCK_258HZ
#define BITS_I2C_MST_CLOCK_258HZ 0x08 |
◆ BITS_I2C_MST_CLOCK_400HZ
#define BITS_I2C_MST_CLOCK_400HZ 0x0D |
◆ MPU9250_ACCEL_DEFAULT_DRIVER_FILTER_FREQ
#define MPU9250_ACCEL_DEFAULT_DRIVER_FILTER_FREQ 30 |
◆ MPU9250_ACCEL_DEFAULT_RATE
#define MPU9250_ACCEL_DEFAULT_RATE 1000 |
◆ MPU9250_ACCEL_MAX_OUTPUT_RATE
#define MPU9250_ACCEL_MAX_OUTPUT_RATE 280 |
◆ MPU9250_DEFAULT_ONCHIP_FILTER_FREQ
#define MPU9250_DEFAULT_ONCHIP_FILTER_FREQ 92 |
◆ MPU9250_GYRO_DEFAULT_DRIVER_FILTER_FREQ
#define MPU9250_GYRO_DEFAULT_DRIVER_FILTER_FREQ 30 |
◆ MPU9250_GYRO_DEFAULT_RATE
#define MPU9250_GYRO_DEFAULT_RATE 1000 |
◆ MPU9250_GYRO_MAX_OUTPUT_RATE
◆ MPU9250_HIGH_BUS_SPEED
#define MPU9250_HIGH_BUS_SPEED 0x8000 |
◆ MPU9250_HIGH_SPEED_OP
◆ MPU9250_IS_HIGH_SPEED
◆ MPU9250_LOW_BUS_SPEED
#define MPU9250_LOW_BUS_SPEED 0 |
◆ MPU9250_LOW_SPEED_OP
◆ MPU9250_REG
◆ MPU9250_REG_MASK
#define MPU9250_REG_MASK 0x00FF |
◆ MPU9250_SET_SPEED
#define MPU9250_SET_SPEED |
( |
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r, |
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s |
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) |
| ((r)|(s)) |
◆ MPU_CLK_SEL_AUTO
#define MPU_CLK_SEL_AUTO 0x01 |
◆ MPU_WHOAMI_6500
#define MPU_WHOAMI_6500 0x70 |
◆ MPU_WHOAMI_9250
#define MPU_WHOAMI_9250 0x71 |
Definition at line 169 of file mpu9250.h.
Referenced by MPU9250::_set_dlpf_filter(), MPU9250::_set_sample_rate(), MPU9250_mag::ak8963_setup(), MPU9250_mag::ak8963_setup_master_i2c(), MPU9250::init(), MPU9250::measure(), MPU9250_SPI::probe(), MPU9250::probe(), MPU9250::reset(), MPU9250::reset_mpu(), and MPU9250::set_accel_range().
◆ MPUREG_ACCEL_CONFIG
#define MPUREG_ACCEL_CONFIG 0x1C |
◆ MPUREG_ACCEL_CONFIG2
#define MPUREG_ACCEL_CONFIG2 0x1D |
◆ MPUREG_ACCEL_XOUT_H
#define MPUREG_ACCEL_XOUT_H 0x3B |
◆ MPUREG_ACCEL_XOUT_L
#define MPUREG_ACCEL_XOUT_L 0x3C |
◆ MPUREG_ACCEL_YOUT_H
#define MPUREG_ACCEL_YOUT_H 0x3D |
◆ MPUREG_ACCEL_YOUT_L
#define MPUREG_ACCEL_YOUT_L 0x3E |
◆ MPUREG_ACCEL_ZOUT_H
#define MPUREG_ACCEL_ZOUT_H 0x3F |
◆ MPUREG_ACCEL_ZOUT_L
#define MPUREG_ACCEL_ZOUT_L 0x40 |
◆ MPUREG_CONFIG
#define MPUREG_CONFIG 0x1A |
◆ MPUREG_EXT_SENS_DATA_00
#define MPUREG_EXT_SENS_DATA_00 0x49 |
◆ MPUREG_FIFO_COUNTH
#define MPUREG_FIFO_COUNTH 0x72 |
◆ MPUREG_FIFO_COUNTL
#define MPUREG_FIFO_COUNTL 0x73 |
◆ MPUREG_FIFO_EN
#define MPUREG_FIFO_EN 0x23 |
◆ MPUREG_FIFO_R_W
#define MPUREG_FIFO_R_W 0x74 |
◆ MPUREG_GYRO_CONFIG
#define MPUREG_GYRO_CONFIG 0x1B |
◆ MPUREG_GYRO_XOUT_H
#define MPUREG_GYRO_XOUT_H 0x43 |
◆ MPUREG_GYRO_XOUT_L
#define MPUREG_GYRO_XOUT_L 0x44 |
◆ MPUREG_GYRO_YOUT_H
#define MPUREG_GYRO_YOUT_H 0x45 |
◆ MPUREG_GYRO_YOUT_L
#define MPUREG_GYRO_YOUT_L 0x46 |
◆ MPUREG_GYRO_ZOUT_H
#define MPUREG_GYRO_ZOUT_H 0x47 |
◆ MPUREG_GYRO_ZOUT_L
#define MPUREG_GYRO_ZOUT_L 0x48 |
◆ MPUREG_I2C_MST_CTRL
#define MPUREG_I2C_MST_CTRL 0x24 |
◆ MPUREG_I2C_MST_DELAY_CTRL
#define MPUREG_I2C_MST_DELAY_CTRL 0x67 |
◆ MPUREG_I2C_MST_STATUS
#define MPUREG_I2C_MST_STATUS 0x36 |
◆ MPUREG_I2C_SLV0_ADDR
#define MPUREG_I2C_SLV0_ADDR 0x25 |
◆ MPUREG_I2C_SLV0_CTRL
#define MPUREG_I2C_SLV0_CTRL 0x27 |
◆ MPUREG_I2C_SLV0_D0
#define MPUREG_I2C_SLV0_D0 0x63 |
◆ MPUREG_I2C_SLV0_REG
#define MPUREG_I2C_SLV0_REG 0x26 |
◆ MPUREG_I2C_SLV1_ADDR
#define MPUREG_I2C_SLV1_ADDR 0x28 |
◆ MPUREG_I2C_SLV1_CTRL
#define MPUREG_I2C_SLV1_CTRL 0x2A |
◆ MPUREG_I2C_SLV1_D0
#define MPUREG_I2C_SLV1_D0 0x64 |
◆ MPUREG_I2C_SLV1_REG
#define MPUREG_I2C_SLV1_REG 0x29 |
◆ MPUREG_I2C_SLV2_ADDR
#define MPUREG_I2C_SLV2_ADDR 0x2B |
◆ MPUREG_I2C_SLV2_CTRL
#define MPUREG_I2C_SLV2_CTRL 0x2D |
◆ MPUREG_I2C_SLV2_D0
#define MPUREG_I2C_SLV2_D0 0x65 |
◆ MPUREG_I2C_SLV2_REG
#define MPUREG_I2C_SLV2_REG 0x2C |
◆ MPUREG_I2C_SLV3_ADDR
#define MPUREG_I2C_SLV3_ADDR 0x2E |
◆ MPUREG_I2C_SLV3_CTRL
#define MPUREG_I2C_SLV3_CTRL 0x30 |
◆ MPUREG_I2C_SLV3_D0
#define MPUREG_I2C_SLV3_D0 0x66 |
◆ MPUREG_I2C_SLV3_REG
#define MPUREG_I2C_SLV3_REG 0x2F |
◆ MPUREG_I2C_SLV4_ADDR
#define MPUREG_I2C_SLV4_ADDR 0x31 |
◆ MPUREG_I2C_SLV4_CTRL
#define MPUREG_I2C_SLV4_CTRL 0x34 |
◆ MPUREG_I2C_SLV4_DI
#define MPUREG_I2C_SLV4_DI 0x35 |
◆ MPUREG_I2C_SLV4_DO
#define MPUREG_I2C_SLV4_DO 0x33 |
◆ MPUREG_I2C_SLV4_REG
#define MPUREG_I2C_SLV4_REG 0x32 |
◆ MPUREG_INT_ENABLE
#define MPUREG_INT_ENABLE 0x38 |
◆ MPUREG_INT_PIN_CFG
#define MPUREG_INT_PIN_CFG 0x37 |
◆ MPUREG_INT_STATUS
#define MPUREG_INT_STATUS 0x3A |
◆ MPUREG_LPACCEL_ODR
#define MPUREG_LPACCEL_ODR 0x1E |
◆ MPUREG_MOT_DETECT_CTRL
#define MPUREG_MOT_DETECT_CTRL 0x69 |
◆ MPUREG_PWR_MGMT_1
#define MPUREG_PWR_MGMT_1 0x6B |
◆ MPUREG_PWR_MGMT_2
#define MPUREG_PWR_MGMT_2 0x6C |
◆ MPUREG_SIGNAL_PATH_RESET
#define MPUREG_SIGNAL_PATH_RESET 0x68 |
◆ MPUREG_SMPLRT_DIV
#define MPUREG_SMPLRT_DIV 0x19 |
◆ MPUREG_TEMP_OUT_H
#define MPUREG_TEMP_OUT_H 0x41 |
◆ MPUREG_TEMP_OUT_L
#define MPUREG_TEMP_OUT_L 0x42 |
◆ MPUREG_USER_CTRL
#define MPUREG_USER_CTRL 0x6A |
◆ MPUREG_WHOAMI
#define MPUREG_WHOAMI 0x75 |
◆ MPUREG_WOM_THRESH
#define MPUREG_WOM_THRESH 0x1F |
◆ MPU9250_constructor
◆ MPU9250_I2C_interface()
◆ MPU9250_probe()
◆ MPU9250_SPI_interface()