PX4 Firmware
PX4 Autopilot Software http://px4.io
uavcan_stm32::bxcan::CanType Struct Reference

#include <bxcan.hpp>

Collaboration diagram for uavcan_stm32::bxcan::CanType:

Public Attributes

volatile uint32_t MCR
 
volatile uint32_t MSR
 
volatile uint32_t TSR
 
volatile uint32_t RF0R
 
volatile uint32_t RF1R
 
volatile uint32_t IER
 
volatile uint32_t ESR
 
volatile uint32_t BTR
 
uint32_t RESERVED0 [88]
 
TxMailboxType TxMailbox [3]
 
RxMailboxType RxMailbox [2]
 
uint32_t RESERVED1 [12]
 
volatile uint32_t FMR
 
volatile uint32_t FM1R
 
uint32_t RESERVED2
 
volatile uint32_t FS1R
 
uint32_t RESERVED3
 
volatile uint32_t FFA1R
 
uint32_t RESERVED4
 
volatile uint32_t FA1R
 
uint32_t RESERVED5 [8]
 
FilterRegisterType FilterRegister [28]
 

Detailed Description

Definition at line 46 of file bxcan.hpp.

Member Data Documentation

◆ BTR

volatile uint32_t uavcan_stm32::bxcan::CanType::BTR

CAN bit timing register, Address offset: 0x1C

Definition at line 54 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::init().

◆ ESR

volatile uint32_t uavcan_stm32::bxcan::CanType::ESR

CAN error status register, Address offset: 0x18

Definition at line 53 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::pollErrorFlagsFromISR().

◆ FA1R

volatile uint32_t uavcan_stm32::bxcan::CanType::FA1R

CAN filter activation register, Address offset: 0x21C

Definition at line 66 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::configureFilters(), and uavcan_stm32::CanIface::init().

◆ FFA1R

volatile uint32_t uavcan_stm32::bxcan::CanType::FFA1R

CAN filter FIFO assignment register, Address offset: 0x214

Definition at line 64 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::configureFilters(), and uavcan_stm32::CanIface::init().

◆ FilterRegister

FilterRegisterType uavcan_stm32::bxcan::CanType::FilterRegister[28]

CAN Filter Register, Address offset: 0x240-0x31C

Definition at line 68 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::configureFilters(), and uavcan_stm32::CanIface::init().

◆ FM1R

volatile uint32_t uavcan_stm32::bxcan::CanType::FM1R

CAN filter mode register, Address offset: 0x204

Definition at line 60 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::configureFilters(), and uavcan_stm32::CanIface::init().

◆ FMR

volatile uint32_t uavcan_stm32::bxcan::CanType::FMR

CAN filter master register, Address offset: 0x200

Definition at line 59 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::configureFilters(), and uavcan_stm32::CanIface::init().

◆ FS1R

volatile uint32_t uavcan_stm32::bxcan::CanType::FS1R

CAN filter scale register, Address offset: 0x20C

Definition at line 62 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::configureFilters(), and uavcan_stm32::CanIface::init().

◆ IER

volatile uint32_t uavcan_stm32::bxcan::CanType::IER

CAN interrupt enable register, Address offset: 0x14

Definition at line 52 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::init().

◆ MCR

volatile uint32_t uavcan_stm32::bxcan::CanType::MCR

CAN master control register, Address offset: 0x00

Definition at line 47 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::init().

◆ MSR

volatile uint32_t uavcan_stm32::bxcan::CanType::MSR

CAN master status register, Address offset: 0x04

Definition at line 48 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::waitMsrINakBitStateChange().

◆ RESERVED0

uint32_t uavcan_stm32::bxcan::CanType::RESERVED0[88]

Reserved, 0x020 - 0x17F

Definition at line 55 of file bxcan.hpp.

◆ RESERVED1

uint32_t uavcan_stm32::bxcan::CanType::RESERVED1[12]

Reserved, 0x1D0 - 0x1FF

Definition at line 58 of file bxcan.hpp.

◆ RESERVED2

uint32_t uavcan_stm32::bxcan::CanType::RESERVED2

Reserved, 0x208

Definition at line 61 of file bxcan.hpp.

◆ RESERVED3

uint32_t uavcan_stm32::bxcan::CanType::RESERVED3

Reserved, 0x210

Definition at line 63 of file bxcan.hpp.

◆ RESERVED4

uint32_t uavcan_stm32::bxcan::CanType::RESERVED4

Reserved, 0x218

Definition at line 65 of file bxcan.hpp.

◆ RESERVED5

uint32_t uavcan_stm32::bxcan::CanType::RESERVED5[8]

Reserved, 0x220-0x23F

Definition at line 67 of file bxcan.hpp.

◆ RF0R

volatile uint32_t uavcan_stm32::bxcan::CanType::RF0R

CAN receive FIFO 0 register, Address offset: 0x0C

Definition at line 50 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::handleRxInterrupt().

◆ RF1R

volatile uint32_t uavcan_stm32::bxcan::CanType::RF1R

CAN receive FIFO 1 register, Address offset: 0x10

Definition at line 51 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::handleRxInterrupt().

◆ RxMailbox

RxMailboxType uavcan_stm32::bxcan::CanType::RxMailbox[2]

CAN FIFO MailBox, Address offset: 0x1B0 - 0x1CC

Definition at line 57 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::handleRxInterrupt().

◆ TSR

volatile uint32_t uavcan_stm32::bxcan::CanType::TSR

◆ TxMailbox

TxMailboxType uavcan_stm32::bxcan::CanType::TxMailbox[3]

CAN Tx MailBox, Address offset: 0x180 - 0x1AC

Definition at line 56 of file bxcan.hpp.

Referenced by uavcan_stm32::CanIface::send().


The documentation for this struct was generated from the following file: