46 #include <px4_platform_common/px4_work_queue/ScheduledWorkItem.hpp> 48 #if !defined(BOARD_HAS_NOISY_FXOS8700_MAG) 53 #define DIR_READ(a) ((a) & 0x7f) 54 #define DIR_WRITE(a) ((a) | (1 << 7)) 55 #define ADDR_7(a) ((a) & (1 << 7)) 56 #define swap16(w) __builtin_bswap16((w)) 57 #define swap16RightJustify14(w) (((int16_t)swap16(w)) >> 2) 59 #define FXOS8701CQ_DR_STATUS 0x00 60 # define DR_STATUS_ZYXDR (1 << 3) 62 #define FXOS8701CQ_OUT_X_MSB 0x01 64 #define FXOS8701CQ_XYZ_DATA_CFG 0x0e 65 # define XYZ_DATA_CFG_FS_SHIFTS 0 66 # define XYZ_DATA_CFG_FS_MASK (3 << XYZ_DATA_CFG_FS_SHIFTS) 67 # define XYZ_DATA_CFG_FS_2G (0 << XYZ_DATA_CFG_FS_SHIFTS) 68 # define XYZ_DATA_CFG_FS_4G (1 << XYZ_DATA_CFG_FS_SHIFTS) 69 # define XYZ_DATA_CFG_FS_8G (2 << XYZ_DATA_CFG_FS_SHIFTS) 71 #define FXOS8701CQ_WHOAMI 0x0d 72 # define FXOS8700CQ_WHOAMI_VAL 0xC7 73 # define FXOS8701CQ_WHOAMI_VAL 0xCA 75 #define FXOS8701CQ_CTRL_REG1 0x2a 76 # define CTRL_REG1_ACTIVE (1 << 0) 77 # define CTRL_REG1_DR_SHIFTS 3 78 # define CTRL_REG1_DR_MASK (7 << CTRL_REG1_DR_SHIFTS) 79 # define CTRL_REG1_DR(n) (((n) & 7) << CTRL_REG1_DR_SHIFTS) 80 #define FXOS8701CQ_CTRL_REG2 0x2b 81 # define CTRL_REG2_AUTO_INC (1 << 5) 83 #define FXOS8701CQ_M_DR_STATUS 0x32 84 # define M_DR_STATUS_ZYXDR (1 << 3) 85 #define FXOS8701CQ_M_OUT_X_MSB 0x33 86 #define FXOS8701CQ_TEMP 0x51 87 #define FXOS8701CQ_M_CTRL_REG1 0x5b 88 # define M_CTRL_REG1_HMS_SHIFTS 0 89 # define M_CTRL_REG1_HMS_MASK (3 << M_CTRL_REG1_HMS_SHIFTS) 90 # define M_CTRL_REG1_HMS_A (0 << M_CTRL_REG1_HMS_SHIFTS) 91 # define M_CTRL_REG1_HMS_M (1 << M_CTRL_REG1_HMS_SHIFTS) 92 # define M_CTRL_REG1_HMS_AM (3 << M_CTRL_REG1_HMS_SHIFTS) 93 # define M_CTRL_REG1_OS_SHIFTS 2 94 # define M_CTRL_REG1_OS_MASK (7 << M_CTRL_REG1_HMS_SHIFTS) 95 # define M_CTRL_REG1_OS(n) (((n) & 7) << M_CTRL_REG1_OS_SHIFTS) 97 #define FXOS8701CQ_M_CTRL_REG2 0x5c 98 #define FXOS8701CQ_M_CTRL_REG3 0x5d 100 #define DEF_REG(r) {r, #r} 103 #define FXOS8701C_ACCEL_DEFAULT_RANGE_G 8 104 #define FXOS8701C_ACCEL_DEFAULT_RATE 400 112 #define FXOS8701C_TIMER_REDUCTION 240 114 class FXOS8701CQ :
public device::SPI,
public px4::ScheduledWorkItem
156 void write_reg(
unsigned reg, uint8_t value);
167 void modify_reg(
unsigned reg, uint8_t clearbits, uint8_t setbits);
208 #if !defined(BOARD_HAS_NOISY_FXOS8700_MAG) uint8_t read_reg(unsigned reg)
Read a register from the FXOS8701C.
void write_reg(unsigned reg, uint8_t value)
Write a register in the FXOS8701C.
perf_counter_t _accel_duplicates
Definition of geo / math functions to perform geodesic calculations.
static constexpr int FXOS8701C_NUM_CHECKED_REGISTERS
Namespace encapsulating all device framework classes, functions and data.
perf_counter_t _mag_sample_perf
FXOS8701CQ(int bus, uint32_t device, enum Rotation rotation)
void write_checked_reg(unsigned reg, uint8_t value)
Write a register in the FXOS8701C, updating _checked_values.
void modify_reg(unsigned reg, uint8_t clearbits, uint8_t setbits)
Modify a register in the FXOS8701C.
perf_counter_t _accel_sample_perf
perf_counter_t _bad_registers
Rotation
Enum for board and external compass rotations.
hrt_abstime _mag_last_measure
#define FXOS8701C_ACCEL_DEFAULT_RATE
void check_registers()
check key registers for correct values
__BEGIN_DECLS typedef uint64_t hrt_abstime
Absolute time, in microsecond units.
unsigned _accel_samplerate
uint8_t _checked_values[FXOS8701C_NUM_CHECKED_REGISTERS]
int accel_set_samplerate(unsigned frequency)
Set the FXOS8701C internal accel and mag sampling frequency.
static const uint8_t _checked_registers[FXOS8701C_NUM_CHECKED_REGISTERS]
int accel_set_range(unsigned max_g)
Set the FXOS8701C accel measurement range.
PX4Accelerometer _px4_accel
Performance measuring tools.
int mag_set_range(unsigned max_g)
Set the FXOS8701C mag measurement range.